Device
Topology Positive Supply  
Schematic
Ideal Gain
Ideal Node Voltages
VIN(+)
V
VREF / VIN-
RS+
RS-
RG
RG2
RF
RF2
Negative Supply  
RX
RL

Application Parameters

Operating Temp., TA °C
Supply Variability
(ripple+load reg.)
%

Error Source Specification Approx. Calculation Absolute
Error
Drift/Gain
Error
Resolution
Error

Resistor Tolerance %   ppm
Resistor Drift, TCR

Temp. difference, TDIFF
ppm / °C
°C
~ (1/2 : noninv) TCR × TDIFF   ppm
Nom. Open Loop Gain, AOL V/mV ppm
Min. Open Loop Gain V/mV   ppm

Input Offset Voltage, VOSI mV VOSI / (VIN-VREF)   ppm
Input Offset Voltage Drift, VOSI_TC µV / °C (2 : inv.) VOSI_TC × (TA-25) /
(VIN-VREF)
  ppm

Bias Current, IB
- Source Imbalance Error
nA ( IB / (VIN-VREF) ) ×
( RF||(RG+RS-) - (RG2+RS+) )
  ppm
Bias Current Drift, IB_TC
- Source Imbalance Drift
pA / °C ( IB_TC × (TA-25) / (VIN-VREF) ) ×
( RF||(RG+RS-) - (RG2+RS+) )
  ppm
Offset Current, IOS
- Source Imbalance Error +
  Source Resistance Error
nA ( IOS / (VIN-VREF) ) ×
( 3*(RF||(RG+RS-)) - (RG2+RS+) )/2
ppm
Offset Current Drift, IOS_TC
- Source Imbalance Drift +
  Source Resistance Drift
pA / °C ( IOS_TC × (TA-25) / (VIN-VREF) ) ×
( 3*(RF||(RG+RS-)) - (RG2+RS+) )/2
  ppm

Common Mode Rejection Ratio, CMRR dB (inv: (1+1/gain)×) 10 -CMRR/20 ×
| (V++V-)/2 - (VS++VS-)/2 | /
| VIN-VREF |
  ppm
Power Supply Rejection Ratio, PSRR dB (inv: (1+1/gain)×) 10 -PSRR/20 × ( | VS+-VS+nom | +
| VS--VS-nom | ) / | VIN-VREF |
ppm
10 -PSRR/20 × SUP-VAR ×
( VS+-VS- ) / | VIN-VREF |
  ppm

Noise BW 0.1 - Hz     ppm   
Voltage noise, VNW nV/√Hz Corner freq   Hz
Current noise, INW pA/√Hz Corner freq   Hz

Total resolution error   ppm
Total drift / gain error   ppm
Total absolute + drift + resolution error   ppm
VFB
VOA
VOUT
VIN
VREF
ZIN